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Special Hardware Support of Software

February 4, 2019

In this post, I write about the z/Architecture hardware support for software like COBOL. I write “like COBOL” because the support is wider than just one important software product, but for this post, I just want to focus on COBOL. This post is an extension to some posts I made in 2018 beginning with “The Dance of Hardware and Software,” which explored the IBM z14 in some detail. I found it fascinating that the z14 engineers developed special instructions to dramatically improve the performance of COBOL applications. This was an important use of engineering resources. 
 
Enterprise COBOL for z/OS V6.2 and the z14
 
Here is the story of the special instructions. In August  2017, Tom M. Ross from IBM Corporation presented “Enterprise COBOL V6.2 was Announced! What's New?” at Share Providence 2017. In the abstract for the talk, he wrote: 

IBM just announced Enterprise COBOL for z/OS, V6.2, on the same day as the z14!
 
IBM Enterprise COBOL for z/OS, V6.2 exploits the capabilities of IBM z/Architecture and adds the following new features and enhancements:

  • Compiler support for the new IBM z14 hardware and IBM z/OS V2.3 OS so applications can take advantage of the latest IBM Z architecture and OS features and capabilities
  • Ability to exploit the new Vector Packed Decimal Facility of z14
  • New and changed COBOL statements, such as the new JSON PARSE statement
  • Improved compiler listings with compiler messages at the end of the listing as in previous releases of the compiler
  • Support of COBOL 2002/2014 standards with the addition of the COBOL Conditional Compilation language feature
  • New and changed COBOL options for increased flexibility
  • Improved usability of the compiler in the z/OS UNIX System Services environment
  • Improved interfaces to optional products and tools such as IBM Debug for IBM Z (formerly Debug Tool for z/OS) and IBM Application Discovery and Delivery Intelligence (formerly EzSource)
  • Compile-time and runtime performance enhancements (AD6) (SA6) (ZOSP1)

Vector Packed Decimal Facility

My interest is in the item listed above in Ross’s list about the ability to exploit the new Vector Packed Decimal Facility of z14. I checked into the latest version of “z/Architecture Principles of Operation” and found that the manual was updated to reflect these new Vector Decimal instructions. Chapter 25 of the book is dedicated to Vector Decimal Instructions. 

IT-Trendz1.jpg

The introduction to the chapter states, “The vector-packed-decimal facility provides instructions to operate on signed-packed-decimal format data in register operands.” 
 
Operating on data in registers is “better” than operating on data in memory. Why is that? The introduction explains: “Since the delay between instructions encountered to ensure sequential order of operand accesses is likely less between register accesses than between storage accesses, a sequence of vector decimal instructions referencing operands in registers may achieve better performance than a comparable sequence of decimal instructions referencing operands in storage.”
 
What’s the Impact on COBOL Programs?
In the Share presentation mentioned earlier, Ross discusses results featuring four different kinds of tests. In the Unsigned Packed Decimal Add test case, the results were 4.85x faster than using the non-vector instructions. For the Large Decimal Divide test, the results were an amazing 135x faster. The Large Decimal Multiply produced results that were 39x faster than the legacy implementation. Finally, the Zoned Decimal Computation case results were 3.05x faster. All the details are in Ross’s Share presentation. This makes interesting reading, and the results support the notion that these new instructions make a significant difference in the performance of COBOL programs that have computations as a key part of their processing logic.
 

Posted February 4, 2019| Permalink

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